Current radio frequency (RF) receiver integrated circuits (ICs) often convert analog signals associated with broadcast channels to digital information and then perform digital processing on this digital information to generate digital data associated with a selected channel. As part of this digital processing, digital clocks are utilized to operate analog-to-digital converters and digital processing blocks. These digital clocks, however, can generate undesirable spurs at frequencies within the broadcast channels being tuned. Frequency planning can be used to adjust digital clock frequencies among a number of specific pre-determined clock frequencies to cause such interfering spurs to fall outside the frequency range for the channel to be tuned. However, this frequency planning can be difficult to achieve, and where multiple receive paths are included in close proximity such as within a single integrated circuit or within a multi-chip package so that multiple different channels can be tuned at the same time, frequency planning can become practically impossible to achieve for certain combinations of channels and digital clock spurs being selected and generated by the digital clocks associated with the different receive paths.
A host processor integrated circuit (IC) is often used to provide operational commands to an RF receiver integrated circuit as part of a larger RF system. The RF system can also include a demodulator integrated circuit that demodulates the output signals provided by the receiver integrated circuit. The host processor IC can utilize information received from the receiver circuitry and/or the demodulator circuitry to control how the receiver circuitry and/or the demodulator circuitry operate within the larger RF system. However, these external communications and related control paths between the host integrated circuit and the receiver and/or demodulator integrated circuit can be relatively slow compared to the signal reception environment being experienced by the RF system. As such, it is often difficult for the host processor integrated circuit to adjust operation of the components within the RF system quickly enough to account for rapid changes in signal conditions. As such, overall performance of the RF system can be degraded. For example, where the RF information being tuned is audio information, the audio content can include undesirable pops/clicks or other undesirable artifacts. And where the RF information being tuned is video information, the video content can include freezes/glitches or other undesirable artifacts. These undesirable artifacts are preferably avoided to maintain an adequate user experience.